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19-0768; Rev 0; 3/07
High-Efficiency CCFL Backlight Controller with SMBus Interface
General Description
The MAX8709B integrated backlight controller is optimized to drive cold-cathode fluorescent lamps (CCFLs) using a resonant full-bridge inverter architecture. The resonant operation maximizes striking capability and provides near-sinusoidal waveforms over the entire input range to improve CCFL lifetime. The controller operates over a wide input voltage range of 4.6V to 28V with high power-to-light efficiency. The device also includes safety features that effectively protect against many single-point fault conditions including lamp-out and short-circuit faults. The MAX8709B achieves 10:1 dimming range by "chopping" the lamp current on and off using a digital pulsewidth-modulation (DPWM) method. The minimum DPWM duty cycle of the MAX8709B is 12.5%. The brightness is controlled with a 2-wire SMBusTM-compatible interface. The device directly drives the four external N-channel power MOSFETs of the full-bridge inverter. An internal 5.3V linear regulator powers the MOSFET drivers, the DPWM oscillator, and most of the internal circuitry. The MAX8709B is available in a space-saving 28-pin thin QFN package and operates over a -40C to +85C temperature range.
Features
Synchronized to Resonant Frequency Longer Lamp Life Guaranteed Striking Capability High Power-to-Light Efficiency Wide Input Voltage Range (4.6V to 28V) Feed Forward for Excellent Line Rejection SMBus Dimming Control Interface 10:1 Dimming Range Guaranteed 200Hz to 220Hz DPWM Frequency Secondary Voltage Limit Reduces Transformer Stress Adjustable Lamp-Out Protection with 1s Timer Secondary Current Limit Protects Against HighVoltage Short Circuits to Ground Small, 5mm x 5mm, Thin QFN Package
MAX8709B
Ordering Information
PART MAX8709BETI TEMP RANGE -40C to +85C PIN-PACKAGE 28 Thin QFN 5mm x 5mm
Applications
Notebook Computer Displays LCD Monitors
SMBus is a trademark of Intel Corp.
LCD TVs Automotive Displays
Pin Configuration appears at end of data sheet.
Minimal Operating Circuit
VIN BATT VCC VDD BST2 LOT REF BST1 GH1
GND
MAX8709B
LX1 ILIM LX2
GL1 CCV CCI PGND GL2 SUS SDA SCL GH2 VFB ISEC IFB
________________________________________________________________ Maxim Integrated Products
1
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
ABSOLUTE MAXIMUM RATINGS
BATT to GND..........................................................-0.3V to +30V BST1, BST2 to GND ...............................................-0.3V to +36V BST1 to LX1, BST2 to LX2 ........................................-0.3V to +6V GH1 to LX1 ..............................................-0.3V to (VBST1 + 0.3V) GH2 to LX2 ..............................................-0.3V to (VBST2 + 0.3V) VCC, VDD to GND .....................................................-0.3V to +6V REF, ILIM to GND .......................................-0.3V to (VCC + 0.3V) GL1, GL2 to GND .......................................-0.3V to (VDD + 0.3V) CCI, CCV, LOT to GND ............................................-0.3V to +6V IFB, ISEC, VFB to GND................................................-6V to +6V SDA, SCL, SUS to GND............................................-0.3V to +6V PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70C) 28-Pin Thin QFN (derate 20.84mW/C above +70C) ..1667mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER VBATT Input Voltage Range VBATT Quiescent Current VBATT Quiescent Current, Shutdown VCC Output Voltage, Normal Operation VCC Output Voltage, Shutdown VCC Undervoltage-Lockout Threshold VCC Undervoltage-Lockout Hysteresis VCC Power-On Reset (POR) Threshold VCC POR Hysteresis REF Output Voltage, Normal Operation GH1, GH2, GL1, GL2 On-Resistance GH1, GH2, GL1, GL2 Output Current BST1, BST2 Leakage Current Input Resonant Frequency Minimum Off-Time Maximum Off-Time Current-Limit Threshold LX1 - GND, LX2 - GND (Fixed) Current-Limit Threshold LX1 - GND, LX2 - GND (Adjustable) Minimum Current Threshold LX1 - GND, LX2 - GND ILIM = VCC VILIM = 0.5V VILIM = 2.0V VBST_ = 12V, VLX_ = 7V Guaranteed by design 25 180 18 180 80 370 280 28 200 100 400 6 4.5V < VCC < 5.5V, ILOAD = 40A ITEST = 100mA, VCC = VDD = 5.3V 1.96 Rising edge 0.90 CONDITIONS VCC = VDD = VBATT VCC = VDD = open VSUS = 5.5V SUS = GND VSUS = 5.5V, 6V < VBATT < 28V, 0 < ILOAD < 20mA SUS = GND, no load VCC rising (leaving lockout) VCC falling (entering lockout) 4.0 200 1.75 50 2.00 9 0.5 5 300 380 38 220 120 430 2.04 18 2.70 5.0 3.5 VBATT = 28V VBATT = VCC = 5V 6 5.35 4.6 MIN 4.6 5.5 1.5 TYP MAX 5.5 28.0 3 3 20 5.5 5.5 4.5 UNITS V mA A V V V mV V mV V A A kHz ns s mV mV mV
2
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High-Efficiency CCFL Backlight Controller with SMBus Interface
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER LOT Input Voltage Range LOT Input Bias Current IFB Input Voltage Range IFB Regulation Point IFB Input Bias Current IFB Lamp-Out Threshold IFB to CCI Transconductance CCI Output Impedance ISEC Input Voltage Range ISEC Regulation Threshold ISEC Input Bias Current VFB Input Voltage Range VFB Input Bias Current VFB Regulation Point VFB to CCV Transconductance VFB Zero-Voltage Crossing Threshold CCV Output Impedance DPWM Chopping Frequency Lamp-Out Detection Timeout Timer SDA, SCL, SUS Input Low Voltage SDA, SCL, SUS Input High Voltage SDA, SCL, SUS Input Hysteresis SDA, SCL, SUS Input Bias Current SDA Output Low Sink Current SCL Serial Clock High Period SCL Serial Clock Low Period START Condition Setup Time START Condition Hold Time SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking-In Data SCL Falling Edge to SDA Transition SCL Falling Edge to SDA Valid, Reading Out Data VSDA = 0.4V THIGH TLOW tSU:STA tHD:STA tSU:DAT tHD:DAT TDV -1 4 4 4.7 4.7 4 250 0 700 2.1 300 +1 VIFB < 0.1V (Note 1) 204 1.14 1V < VCCV < 2.7V -10 20 210 1.22 216 1.30 0.8 VVFB = 0.5V VISEC = 1.25V -2 1.20 -2 -2 -0.5 490 510 40 +10 1.25 VIFB = 0.4V LOT = REF 1V < VCCI < 2.5V CONDITIONS MIN 0.5 -2 -1.7 380 -2 500 600 100 20 +2 1.30 +2 +2 +0.5 530 400 TYP MAX VREF +2 +1.7 420 +2 700 UNITS V A V mV A mV S M V V A V A mV S mV M Hz s V V mV A mA s s s s ns ns ns
MAX8709B
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER VBATT Input Voltage Range VBATT Quiescent Current VBATT Quiescent Current, Shutdown VCC Output Voltage, Normal Operation VCC Output Voltage, Shutdown VCC Undervoltage-Lockout Threshold VCC Power-On Reset (POR) Threshold REF Output Voltage, Normal Operation GH1, GH2, GL1, GL2 On-Resistance BST1, BST2 Leakage Current Input Resonant Frequency Minimum Off-Time Maximum Off-Time Current-Limit Threshold LX1 - GND, LX2 - GND (Fixed) Current-Limit Threshold LX1 - GND, LX2 - GND (Adjustable) Current-Limit Leading-Edge Blanking LOT Input Voltage Range LOT Input Bias Current IFB Input Voltage Range IFB Regulation Point IFB Input Bias Current IFB Lamp-Out Threshold ISEC Input Voltage Range ISEC Regulation Point ISEC Input Bias Current VFB Input Voltage Range VFB Input Bias Current VFB Regulation Point VFB Zero-Voltage Crossing Threshold DPWM Chopping Frequency VVFB = 0.5V VISEC = 1.25V VIFB = 0.4V LOT = REF ILIM = VCC VILIM = 0.5V VILIM = 2.0V CONDITIONS VCC = VDD = VBATT VCC = VDD = open VSUS = 5.5V SUS = GND VSUS = 5.5V, 6V < VBATT < 28V, 0 < ILOAD < 20mA SUS = GND, no load VCC rising (leaving lockout) VCC falling (entering lockout) Rising edge 4.5V < VCC < 5.5V, ILOAD = 40A ITEST = 100mA, VCC = VDD = 5.3V VBST_ = 12V, VLX_ = 7V Guaranteed by design 25 180 18 180 80 370 250 0.5 -2 -1.7 380 -2 500 -2 1.20 -2 -2 -0.5 490 -10 204 4.0 0.90 1.95 2.70 2.05 18 5 300 380 38 220 120 430 450 VREF +2 +1.7 420 +2 700 +2 1.30 +2 +2 +0.5 530 +10 216 5.0 3.5 VBATT = 28V VBATT = VCC = 5V MIN 4.6 5.5 TYP MAX 5.5 28.0 3 3 20 5.5 5.5 4.5 UNITS V mA A V V V V V A kHz ns s mV mV ns V A V mV A mV V V A V A mV mV Hz
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High-Efficiency CCFL Backlight Controller with SMBus Interface
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 2)
PARAMETER Lamp-Out Detection Timeout Timer SDA, SCL, SUS Input Low Voltage SDA, SCL, SUS Input High Voltage SDA, SCL, SUS Input Bias Current SDA Output Low Sink Current SCL Serial Clock High Period SCL Serial Clock Low Period START Condition Setup Time START Condition Hold Time SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking-In Data SCL Falling Edge to SDA Transition VSDA = 0.4V THIGH TLOW tSU:STA tHD:STA tSU:DAT tHD:DAT 2.1 -1 4 4 4.7 4.7 4 250 0 +1 CONDITIONS VIFB < 0.1V (Note 1) MIN 1.14 TYP MAX 1.30 0.8 UNITS s V V A mA s s s s ns ns
MAX8709B
Note 1: Corresponds to 256 DPWM cycles. Note 2: Specifications to -40C are guaranteed by design based on final characterization results.
Typical Operating Characteristics
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = +25C, unless otherwise noted.)
LOW INPUT-VOLTAGE OPERATION (VBATT = 8V)
MAX8709 toc01
HIGH INPUT-VOLTAGE OPERATION (VBATT = 20V)
MAX8709 toc02
LINE-TRANSIENT RESPONSE
MAX8709 toc03
0V A
0V A 8V
A
0V B
0V B
0V B
C 0V 0V
C
0V C
D 0V 10s/div A: VIFB, 2V/div B: VVFB, 2V/div C: VLX1, 10V/div D: VLX2, 10V/div A: VIFB, 2V/div B: VVFB, 2V/div C: VLX1, 10V/div D: VLX2, 10V/div D 10s/div A: VBATT, 5V/div B: VIFB, 2V/div C: VVFB, 2V/div D: VLX1, 10V/div 0V 40s/div 0V
D
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = +25C, unless otherwise noted.)
STARTUP
MAX8709 toc04
DPWM OPERATION (10%)
MAX8709 toc05
DPWM OPERATION (50%)
MAX8709 toc06
A 0V 0V B 0V 0V C 1.2V
A
A 1.2V
B
0V
B
0V D 0V 2ms/div A: VSUS, 5V/div B: VIFB, 2V/div C: VVFB, 2V/div D: VLX1, 10V/div A: VCCV, 200mV/div B: VIFB, 1V/div C: VVFB, 1V/div 1ms/div
C
0V
C
1ms/div A: VCCV, 200mV/div B: VIFB, 1V/div C: VVFB, 1V/div
DPWM SOFT-START
MAX8709 toc07
DPWM SOFT-STOP
MAX8709 toc08
LAMP-OUT VOLTAGE LIMITING AND TIMEOUT
MAX8709 toc09
CCI CCV 1.2V
CCI
0V A
CCV 0V A 0V A
0V
B
0V
B
0V
B
40s/div A: VIFB, 1V/div B: VVFB, 1V/div A: VIFB, 1V/div B: VVFB, 1V/div
40s/div
200ms/div A: VVFB, 1V/div B: VIFB, 1V/div
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High-Efficiency CCFL Backlight Controller with SMBus Interface
Typical Operating Characteristics (continued)
(Circuit of Figure 1. VBATT = 12V, VLOT = VREF, VCC = VDD, VSUS = 5.3V, TA = +25C, unless otherwise noted.)
SWITCHING FREQUENCY vs. INPUT VOLTAGE
MAX8709 toc10
MAX8709B
DPWM FREQUENCY vs. INPUT VOLTAGE
MAX8709 toc11
ELECTRICAL EFFICIENCY vs. INPUT VOLTAGE
MAX8709 toc12
62
220
100
SWITCHING FREQUENCY (kHz)
DPWM FREQUENCY (Hz)
58
215
ELECTRICAL EFFICIENCY (%)
90
80
54
210
70
50
205
60
46 7 10 13 16 19 22 25 INPUT VOLTAGE (V)
200 7 10 13 16 19 22 25 INPUT VOLTAGE (V)
50 7 10 13 16 19 22 25 INPUT VOLTAGE (V)
NORMALIZED RMS LAMP CURRENT vs. INPUT VOLTAGE
MAX8709 toc13
REF LOAD REGULATION
MAX8709 toc14
NORMALIZED BRIGHTNESS vs. BRIGHTNESS CODE
MAX8709 toc15
0.8 RMS LAMP-CURRENT ERROR (%) 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 7 10 13 16 19 22
0.10
100 NORMALIZED BRIGHTNESS (%)
REF VOLTAGE ERROR (%)
0.05
80
0
60
-0.05
40
-0.10
20
-0.15 25 0 20 40 60 80 100 INPUT VOLTAGE (V) REF LOAD CURRENT (A)
0 0 4 8 12 16 20 24 28 32 BRIGHTNESS CODE
NORMALIZED VCC LINE REGULATION
VCC = 5.3V 0 VCC VOLTAGE ERROR (%) -0.2 -0.4 -0.6 -0.8 -1.0 5 10 15 INPUT VOLTAGE (V) 20 25
MAX8709 toc16
VCC LOAD REGULATION
MAX8709 toc17
REF OUTPUT vs. TEMPERATURE
MAX8709 toc18
0.2
0
0.05 0 REF VOLTAGE ERROR (%) -0.05 -0.10 -0.15 -0.20 -0.25
VCC VOLTAGE ERROR (%)
-0.3
-0.6
-0.9
-1.2
-1.5 0 4 8 12 16 EXTERNAL LOAD CURRENT (mA) 20
-40
-20
0
20
40
60
80
100
TEMPERATURE (C)
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Pin Description
PIN 1 NAME ILIM FUNCTION Current-Limit Threshold Adjustment. Connect a resistive voltage-divider between REF or VCC and GND. The current-limit threshold measured between LX_ and GND is 1/5 the voltage forced at ILIM. The ILIM adjustment range is 0 to 3V. Connect ILIM to VCC to select the default current-limit threshold of 0.2V. 2V Reference Output. Bypass REF to GND with a 0.1F ceramic capacitor. REF is discharged to GND during shutdown. Lamp-Out Threshold Adjustment. The lamp-out threshold is 30% of the voltage at LOT. The LOT adjustment range is from 0.5V to VREF. Analog Ground. The ground return for VCC, REF, and other analog circuitry. Connect GND to PGND under the IC at the IC's backside exposed metal pad. Secondary Current-Limit Sense Input. The secondary current limit controls the transformer secondary current even if the IFB sense resistor is shorted. See the Secondary Current Limit (ISEC) section. SMBus Serial Data Input SMBus Serial Clock Input SMBus Suspend Input No Connection. Not internally connected. Gate-Driver Supply Input. Connect VDD to VCC, the output of the linear regulator. Bypass VDD with a 0.1F capacitor to PGND. Power Ground. Gate-driver current flows through this pin. Low-Side MOSFET NL2 Gate-Driver Output Low-Side MOSFET NL1 Gate-Driver Output High-Side MOSFET NH1 Gate-Driver Output Switching Node Connection. LX1 is the internal gate driver's (GH1's) source connection for the high-side MOSFET NH1. LX1 is also the sense input to the current comparators. Driver Bootstrap Input for High-Side MOSFET NH1. Connect BST1 through a diode to VDD and through a 0.1F capacitor to LX1 (Figure 1). Driver Bootstrap Input for High-Side MOSFET NH2. Connect BST2 through a diode to VDD and through a 0.1F capacitor to LX2 (Figure 1). Switching Node Connection. LX2 is the internal gate driver's (GH2's) source connection for the high-side MOSFET NH2. LX2 is also the sense input to the current comparators. High-Side MOSFET NH2 Gate-Driver Output Lamp Output Feedback Sense Input. The average value on VFB is regulated during startup and openlamp conditions to 0.5V by controlling the on-time of high-side switches. A capacitive voltage-divider between the CCFL lamp output and GND is sensed to set the maximum average lamp output voltage. Lamp Current-Sense Input. The voltage on IFB is used to regulate the lamp current. If the IFB input falls below 30% of the LOT voltage for 1.22s, then the MAX8709B activates the lamp-out fault latch. Current-Loop Compensation Pin. CCI is the output of the current-loop transconductance amplifier (GMI) that regulates the CCFL current. The CCI voltage controls the time interval during which the full bridge applies the input voltage (BATT) to the transformer primary. Connect CCI to GND through a 0.1F capacitor. CCI is internally discharged to GND in shutdown.
2 3 4 5 6 7 8 9, 10, 11, 23 12 13 14 15 16 17 18 19 20 21 22
REF LOT GND ISEC SDA SCL SUS N.C. VDD PGND GL2 GL1 GH1 LX1 BST1 BST2 LX2 GH2 VFB
24
IFB
25
CCI
8
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High-Efficiency CCFL Backlight Controller with SMBus Interface
Pin Description (continued)
PIN NAME FUNCTION Voltage-Loop Compensation Pin. CCV is the output of the voltage-loop transconductance amplifier (GMV) that regulates the maximum average secondary transformer voltage. The CCV voltage controls the time interval during which the full bridge applies the input voltage (BATT) to the transformer primary. The CCV capacitor also sets the rise time and fall time of the lamp current in DPWM. Connect CCV to GND with a 6.8nF capacitor. CCV is internally discharged to GND in shutdown. MAX8709B Supply Input. Input to the internal 5.3V linear regulator (VCC) that provides power to the device. Bypass BATT to GND with a 0.1F capacitor. 5.3V Linear-Regulator Output. VCC is the supply voltage for the MAX8709B. Bypass VCC to GND with a 0.47F ceramic capacitor. VCC can also be connected to BATT if VBATT < 5.5V.
MAX8709B
26
CCV
27 28
BATT VCC
VIN 7V TO 24V C1 4.7F 25V C7 0.47F GND LOT VDD BST2 BST1 REF C9 0.1F R4 100k ILIM R5 100k GH1 C6 0.1F LX1 C5 0.1F LX2 NH1 NH2 D1
BATT C8 0.1F
VCC
MAX8709B
C2 1F
T1 1:93
CCFL
GL1 CCV C10 0.01F PGND
NL1
NL2 C3 15pF 3kV
CCI C11 0.1F SMBSUS SUS
GL2
GH2
VFB SMBDATA SDA SMBCLK SCL IFB ISEC R3 40.2 1% C4 22nF R2 2k R1 150 1%
Figure 1. Typical Operating Circuit of the MAX8709B _______________________________________________________________________________________ 9
MAX8709B
High-Efficiency CCFL Backlight Controller with SMBus Interface
Figure 2. MAX8709B Functional Diagram
VIN BATT
10
MAX8709B
VCC DPWM COMP SUPPLY REF DPWM OSC SMBus INTERFACE BRIGHTNESS DAC LAMP-OUT COMP GND BST1 0.5V GMV GH1 LX1 RAMP GENERATOR GH2 PEAK DETECTOR IMIN COMP GL1 LX2 MUX LX1 IMAX COMP VDD GL2 SEC OC COMP 400A PGND 1.25V ISEC LX2 CCFL 6mV CONTROL LOGIC BST2 PWM COMP CCV CLAMP PK_DET CLAMP GMI 0.4V
SUS
SDA
SCL
REF
LOT
CCV
VFB
CCI
IFB
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REF
ILIM
High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Table 1. Component List
DESIGNATION DESCRIPTION 4.7F 20%, 25V X5R ceramic capacitor (1210) Murata GRM32RR61E475K Taiyo Yuden TMK325BJ475MN TDK C3225X7R1E475M 1F 10%, 25V X7R ceramic capacitor (1206) Murata GRM31MR71E105K Taiyo Yuden TMK316BJ105KL TDK C3216X7R1E105K 15pF 1pF, 3kV high-voltage ceramic capacitor (1808) Murata GRM42D1X3F150J TDK C4520C0G3F150F 0.022F 10%, 16V X7R ceramic capacitor (0402) Murata GRP155R71C223K Taiyo Yuden EMK105BJ223KV TDK C1005X7R1C223K 0.1F 10%, 25V X7R ceramic capacitors (0603) Murata GRM188R71E104K Taiyo Yuden TMK107BJ104KA TDK C1608X7R1E104K DESIGNATION DESCRIPTION 0.47F 10%, 10V X5R ceramic capacitor (0603) Taiyo Yuden LMK107BJ474KA TDK C1608X5R1A474K Dual silicon switching diode, common anode (SOT-323) Central Semiconductor CMSD2836 Diodes Incorporated BAW56W 30V, 0.095 dual n-channel MOSFETs (6-pin SOT23) Fairchild FDC6561AN 150 1% resistor (0603) 2k 5% resistor (0603) 39 1% resistor (0603) 100k 5% resistors (0603) CCFL transformer, 1:93 turns ratio Sumida 5371-400-W1423 TOKO T912MG-1018
C1
C7
D1
C2
NH1/2, NL1/2 R1 R2 R3 R4, R5 T1
C3
C4
Detailed Description
The MAX8709B controls a full-bridge resonant inverter to convert an unregulated DC input into a near-sinusoidal AC output for powering CCFLs. The lamp brightness is adjusted by turning the lamp on and off with an internal DPWM signal. The duty cycle of the DPWM signal is set through an SMBus-compatible 2-wire serial interface. Figure 2 shows the functional diagram of the MAX8709B.
C5, C6, C8, C9
Table 2. Component Suppliers
SUPPLIER Central Semiconductor Fairchild Semiconductor Murata Sumida Taiyo Yuden TDK WEBSITE www.centralsemi.com www.fairchildsemi.com www.murata.com www.sumida.com www.t-yuden.com www.components.tdk.com
Resonant Operation
The MAX8709B drives the four n-channel power MOSFETs that make up the zero-voltage-switching (ZVS) full-bridge inverter as shown in Figure 3. Assume that NH1 and NL2 are turned on at the beginning of a switching cycle as shown in Figure 3(a). The primary current flows through MOSFET NH1, DC blocking cap C2, the primary side of transformer T1, and MOSFET NL2. During this interval, the primary current ramps up until the controller turns off NH1. When NH1 turns off, the primary current forward biases the body diode of NL1, which clamps the LX1 voltage just below ground as shown in Figure 3(b). When the controller turns on NL1, its drain-tosource voltage is near zero because its forward-biased body diode clamps the drain. Since NL2 is still on, the primary current flows through NL1, C2, the primary side of T1, and NL2. Once the primary current drops to the minimum current threshold (6mV / RDS(ON)), the controller turns off NL2. The remaining energy in T1 charges up the LX2 node until the body diode of NH2 is forward biased.
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Typical Operating Circuit
The Typical Operating Circuit of the MAX8709B (Figure 1) is a complete CCFL backlight inverter for notebook TFT LCD panels. The circuit works over an input voltage range of 7V to 24V with an RMS lamp current of 6mA. The circuit's maximum RMS open-lamp voltage is limited to 1600V. Table 1 lists recommended component options, and Table 2 lists the component suppliers' contact information.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
VBATT VBATT
NH1 ON T1 C2 LX1 LX2
NH2 OFF
NH1 OFF T1 C2 LX1 LX2
NH2 ON
NL1 OFF
NL2 ON
NL1 ON
NL2 OFF
(a) VBATT
(c) VBATT
NH1 OFF T1 C2 LX1 LX2
NH2 OFF
NH1 OFF T1 C2 LX1 LX2
NH2 OFF
NL1 ON
NL2 ON
NL1 ON
NL2 ON
(BODY DIODE TURNS ON FIRST) (b) (d)
(BODY DIODE TURNS ON FIRST)
Figure 3. Resonant Operation
When NH2 turns on, it does so with near-zero drain-tosource voltage. The primary current reverses polarity as shown in Figure 3(c), beginning a new cycle with the current flowing in the opposite direction, with NH2 and NL1 on. The primary current ramps up until the controller turns off NH2. When NH2 turns off, the primary current forward biases the body diode of NL2, which clamps the LX2 voltage just below ground as shown in Figure 3(d). After the LX2 node goes low, the controller losslessly turns on NL2. Once the primary current drops to the minimum current threshold, the controller turns off NL1. The remaining energy charges up the LX1 node until the body diode of NH1 is forward biased. Finally, NH1 losslessly turns on, beginning a new cycle as shown in Figure 3(a). Note that
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switching transitions on all four power MOSFETs occur under ZVS conditions, which reduce transient power losses and EMI. The simplified CCFL inverter circuit is shown in Figure 4(a). The full-bridge power stage is simplified and represented as a square-wave AC source. The resonant tank circuit can be further simplified to Figure 4(b) by removing the transformer. CS is the primary series capacitor, C'S is the series capacitance reflected to the secondary, CP is the secondary parallel capacitor, N is the transformer turns ratio, L is the transformer secondary leakage inductance, and RL is an idealized resistance that models the CCFL in normal operation.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
CS 1:N L
4 AC SOURCE CP CCFL VOLTAGE GAIN (V/V) 3 RL INCREASING 2
(a)
C C'S = S N2
L
1
0 AC SOURCE CP RL 0 20 40 60 80 100 FREQUENCY (kHz)
(b)
Figure 4. Equivalent Resonant Tank Circuit
Figure 5. Frequency Response of the Resonant Tank
Figure 5 shows the frequency response of the resonant tank's voltage gain under different load conditions. The primary series capacitor is 1F, the secondary parallel capacitor is 15pF, the transformer turns ratio is 1:93, and the secondary leakage inductance is 260mH. Notice there are two peaks, fS and fP, in the frequency response. The first peak, fS, is the series resonant peak determined by the reflected series capacitor and the secondary leakage inductance: fS = 1 2 LC'S
Once the lamp is ionized, the equivalent load resistance decreases rapidly and the operating point moves toward the series resonant peak. The series resonant operation causes the circuit to behave like a current source.
Current and Voltage Control Loops (CCI, CCV)
The MAX8709B uses a current loop and a voltage loop to control the power delivered to the CCFL. The current loop is the dominant loop in regulating the lamp current. The voltage loop limits the transformer secondary voltage and is active during startup, the DPWM offtime, and open-lamp fault. Both the current and the voltage loops use transconductance error amplifiers for regulation. The AC lamp current is measured with a sense resistor in series with the CCFL. The voltage across this resistor is applied to the IFB input and is internally half-wave rectified. The current-loop transconductance error amplifier compares the rectified IFB voltage with a 400mV internal threshold to create an error current. The error current charges and discharges a capacitor connected between CCI and ground to generate an error voltage VCCI. Similarly, the AC voltage across the transformer secondary winding is measured through a capacitive voltage-divider. The sense voltage is applied to the VFB input and is internally half-wave rectified. The voltage-loop transconductance error amplifier compares the rectified VFB voltage with a 500mV internal threshold to create an error current. The error current charges
13
The second peak, fP, is the parallel resonant peak determined by the reflected series capacitor, the parallel capacitor, and the secondary leakage inductance: fP = 2 L 1 C'S CP C'S + CP
These two frequencies set the lower and upper boundaries of resonant operation. When the lamp is off, the operating point of the resonant tank is close to the parallel resonant peak due to the infinite lamp impedance. The circuit displays the characteristics of a parallelloaded resonant converter, acting like a voltage source to generate the necessary striking voltage. Theoretically, the output voltage of the resonant converter keeps going until the lamp is ionized.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
and discharges a capacitor connected between CCV and ground to generate an error voltage VCCV. The lower of VCCI and VCCV takes control and is compared with an internal ramp signal to set the high-side MOSFET switch on-time (tON). circuit to operate in dropout if the backlight's performance is not critical. When VBATT is very low, the controller loses current regulation and runs at maximum duty cycle. Under these circumstances, a transient overvoltage condition could occur when the AC adapter is suddenly applied to power the circuit. The feed-forward circuitry minimizes variations in lamp voltage due to such input voltage steps. The regulator also clamps the voltage on VCCI. These two features together ensure that overvoltage transients do not appear on the transformer when leaving dropout. The VCCI clamp is unique in that it limits VCCI to the peak voltage of the PWM ramp. As the circuit reaches dropout, VCCI approaches the PWM ramp's peak in order to reach maximum tON. If VBATT decreases further, the control loop loses regulation and VCCI tries to reach its positive supply rail. The clamp on VCCI prevents this from happening and VCCI rides just above the PWM ramp's peak. If VBATT continues to decrease, the feed-forward control reduces the amplitude of the PWM ramp and the clamp pulls V CCI down. When VBATT suddenly steps out of dropout, VCCI is still low and maintains the drive on the transformer at the old dropout level. The control loop then slowly corrects and increases VCCI to bring the circuit back into regulation.
Lamp Startup
A CCFL is a gas discharge lamp that is normally driven in the avalanche mode. To start ionization in a nonionized lamp, the applied voltage (striking voltage) must be increased to the level required for the start of avalanche. The striking voltage can be several times the typical operating voltage. Because of the resonant topology, the striking voltage is guaranteed regardless of the temperature. Before the lamp is ionized, the lamp impedance is infinite. The transformer secondary leakage inductance and the high-voltage parallel capacitor determine the unloaded resonant frequency. Since the unloaded resonant circuit has a high Q, it is easy to generate high voltages across the lamp. Operation during startup differs from the steady-state condition described in the Current and Voltage Control Loops section. Upon power-up, V CCI slowly rises, increasing the duty cycle, which provides soft-start. During this time, VCCV is limited to 150mV above VCCI. Once the secondary voltage reaches the strike voltage, the lamp current begins to increase. When the lamp current reaches the regulation point, V CCI exceeds VCCV and it reaches steady state.
DPWM Dimming Control
The MAX8709B controls the brightness of the CCFL by "chopping" the lamp current on and off using an internal DPWM signal. The frequency of the DPWM signal is 210Hz. The brightness code set through the SMBus interface determines the duty cycle of the DPWM signal. A brightness code of 0b00000 corresponds to a 12.5% duty cycle for the MAX8709B. A brightness code of 0b11111 corresponds to a 100% DPWM duty cycle. The duty cycle changes by 3.125% per step. Codes 0b00000 to 0b00011 all produce 12.5% for the MAX8709B. In DPWM operation, the CCI and CCV control loops work together to regulate the lamp current, limit the secondary voltage, and control the rising and falling of the lamp current. During the DPWM off-cycle, the output of the voltage-loop error amplifier (CCV) is set to 1.15V and the current-loop error-amplifier output (CCI) is high impedance. The high-impedance output acts like a sampleand-hold circuit to keep VCCI from changing during the off-cycles. At the beginning of the DPWM on-cycle, VCCV linearly rises, gradually increasing tON, which provides soft-start. Once VCCV exceeds VCCI, the current-loop error amplifier takes control and starts to regulate the lamp current. In the meantime, VCCV continues to rise and is limited to 150mV above VCCI. At the end of the DPWM on-cycle, the CCV capacitor discharges linearly, gradually decreasing tON and providing soft-stop.
Feed-Forward Control and Dropout Operation
The MAX8709B is designed to maintain tight control of the transformer secondary under all transient conditions including dropout. The feed-forward control instantaneously adjusts the tON time for changes in input voltage (VBATT). This feature provides immunity to input voltage variations and simplifies loop compensation over wide input voltage ranges. The feed-forward control also improves the line regulation for short DPWM on-times and makes startup transients less dependent on the input voltage. Feed-forward control is implemented by increasing the PWM's internal voltage ramp rate for higher VBATT. This has the effect of varying tON as a function of the input voltage while maintaining about the same signal levels at VCCI and VCCV. Since the required voltage change across the compensation capacitors is minimal, the controller's response to input voltage changes is essentially instantaneous. To maximize run time, it may be desirable to allow the
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High-Efficiency CCFL Backlight Controller with SMBus Interface
POR and UVLO
The MAX8709B includes power-on-reset (POR) and undervoltage-lockout (UVLO) circuits. The POR resets all internal registers such as DAC outputs, fault latches, and all SMBus registers. POR occurs when VCC is below 1.5V. The SMBus input logic thresholds are only guaranteed to meet electrical characteristic limits for VCC as low as 3.5V, but the interface continues to function down to the POR threshold. The UVLO is activated and disables both high-side and low-side switch drivers when VCC is below 4.2V (typ).
Primary Overcurrent Protection (ILIM)
The MAX8709B senses primary current in each switching cycle. When the regulator turns on the low-side MOSFET, a comparator monitors the voltage drop from LX_ to GND. If the voltage exceeds the current-limit threshold, the regulator turns off the high-side switch at the opposite side of the primary to prevent the transformer primary current from increasing further. The current-limit threshold can be adjusted using the ILIM input. Connect a resistive voltage-divider between REF or VCC and GND with the midpoint connected to ILIM. The current-limit threshold measured between LX_ and GND is 1/5 the voltage at ILIM. The ILIM adjustment range is 0 to 3V. Connect ILIM to VCC to select the default current-limit threshold of 0.2V.
MAX8709B
Low-Power Shutdown (SUS)
When the MAX8709B is placed in shutdown, all functions of the IC are turned off except for the 5.3V linear regulator that powers all internal registers and the SMBus interface. The SMBus interface is accessible in shutdown. In shutdown, the linear-regulator output voltage drops to about 4.5V and the supply current is 6A (typ), which is the required power to maintain all internal register states. While in shutdown, lamp-out detection and short-circuit detection latches are reset. The device can be placed into shutdown either by writing to the shutdown-mode register or pulling SUS low.
Secondary Current Limit (ISEC)
The secondary current limit provides fail-safe current limiting in case a failure, such as a short circuit or leakage from the lamp high-voltage terminal to ground, prevents the CCI current control loop from functioning properly. ISEC monitors the voltage across a sense resistor placed between the transformer's low-voltage secondary terminal and ground. The ISEC voltage is internally half-wave rectified and continuously compared to the ISEC regulation threshold (1.25V typ). Any time the ISEC voltage exceeds the threshold, a controlled current is drawn from CCI to reduce the on-time of the bridge's high-side switches.
Lamp-Out Protection
For safety, the MAX8709B monitors the lamp-current feedback (IFB) to detect faulty or open CCFL tubes and secondary short circuits in the lamp and IFB sense resistor. If the voltage on IFB is continuously below 30% of the LOT voltage for greater than 1.22s (typ), the MAX8709B latches off the full bridge. Unlike the normal shutdown mode, the linear-regulator output (V CC ) remains at 5.3V. Toggling SUS or cycling the input power reactivates the device. During the 1.22s delay, VCCI slowly rises, increasing tON in an attempt to maintain lamp current regulation. As VCCI rises, VCCV rises with it until the secondary voltage reaches its preset limit. At this point, V CCV stops and limits the secondary voltage by limiting tON. Because VCCV is limited to 150mV above VCCI, the voltage control loop is able to quickly limit the secondary voltage. Without this clamping feature, the transformer voltage overshoots to dangerous levels because VCCV takes time to slew down from its supply rail.
Reference Output (REF)
The reference output is nominally 2V, and can source at least 40A (see the Typical Operating Characteristics). Bypass REF with a 0.22F ceramic capacitor connected between REF and GND.
Linear-Regulator Output (VCC)
The internal linear regulator steps down the DC input voltage to 5.3V (typ). The linear regulator supplies power to the internal control circuitry of the MAX8709B and can also be used to power the MOSFET drivers by connecting VCC directly to VDD. The VCC voltage drops to 4.5V in shutdown.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Write-Byte Format S ADDRESS 7 BITS
SLAVE ADDRESS
WR 1B
ACK 1B
COMMAND 8 BITS
COMMAND BYTE: SELECTS WHICH REGISTER YOU ARE WRITING TO
ACK 1B
DATA 8 BITS
ACK 1B
P
DATA BYTE: DATA GOES INTO THE REGISTER SET BY THE COMMAND BYTE
Read-Byte Format S ADDRESS 7 BITS
SLAVE ADDRESS
WR 1B
ACK 1B
COMMAND 8 BITS
ACK 1B
S
ADDRESS 7 BITS
RD 1B
ACK 1B
DATA 8 BITS
/// 1B
P
COMMAND BYTE: SELECTS WHICH REGISTER YOU ARE READING FROM
SLAVE ADDRESS: REPEATED DUE TO CHANGE IN DATAFLOW DIRECTION
DATA BYTE: READS FROM THE REGISTER SET BY THE COMMAND BYTE
Send-Byte Format S ADDRESS 7 BITS WR 1B ACK 1B COMMAND 8 BITS ACK 1B P
Receive-Byte Format S ADDRESS 7 BITS
SLAVE ADDRESS
RD 1B
ACK 1B
DATA 8 BITS
/// 1B
P
COMMAND BYTE: SENDS COMMAND WITH NO DATA; USUALLY USED FOR ONE-SHOT COMMAND
S = START CONDITION P = STOP CONDITION
SHADED = SLAVE TRANSMISSION ACK= ACKNOWLEDGED = 0 /// = NOT ACKNOWLEDGED = 1
WR = WRITE = 0 RD = READ =1
DATA BYTE: READS DATA FROM THE REGISTER COMMANDED BY THE LAST READ-BYTE OR WRITEBYTE TRANSMISSION; ALSO USED FOR SMBUS ALERT RESPONSE RETURN ADDRESS
Figure 6. SMBus Protocols
SMBus Interface (SDA, SCL)
The MAX8709B supports an Intel SMBus-compatible 2wire digital interface. SDA is the bidirectional data line and SCL is the clock line of the 2-wire interface corresponding respectively to SMBDATA and SMBCLK lines of the SMBus. SDA and SCL are Schmidt-triggered inputs that can accommodate slow edges; however, the rising and falling edges should still be faster than 1s and 300ns, respectively. The MAX8709B use the write-byte, read-byte, and receive-byte protocols (Figure 6). The SMBus protocols are documented in System Management Bus Specification V1.1 and are available at http://www.SMBus.org/.
The MAX8709B is a slave-only device and responds to the 7-bit address 0b01011000 (i.e., with the R/W bit clear indicating a write, this corresponds to 0x58). The MAX8709B has three functional registers: a 5-bit brightness register (BRIGHT4-BRIGHT0), a 3-bit shutdownmode register (SHMD2-SHMDE0), and a 2-bit status register (STATUS1-STATUS0). In addition, the device has three identification (ID) registers: an 8-bit chip ID register, an 8-bit chip revision register, and an 8-bit manufacturer ID register.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
A tLOW B tHIGH C D E F G H I J K L M
SMBCLK
SMBDATA
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT
tHD:DAT
tSU:STO tBUF J = ACKNOWLEDGE CLOCKED INTO MASTER K = ACKNOWLEDGE CLOCK PULSE L = STOP CONDITION, DATA EXECUTED BY SLAVE M = NEW START CONDITION
A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO SLAVE H = LSB OF DATA CLOCKED INTO SLAVE I = SLAVE PULLS SMBDATA LINE LOW
Figure 7. SMBus Write Timing
A tLOW
B tHIGH
C
D
E
F
G
H
I
J
K
SMBCLK
SMBDATA
tSU:STA tHD:STA A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = R/W BIT CLOCKED INTO SLAVE
tSU:DAT
tHD:DAT E = SLAVE PULLS SMBDATA LINE LOW F = ACKNOWLEDGE BIT CLOCKED INTO MASTER G = MSB OF DATA CLOCKED INTO MASTER H = LSB OF DATA CLOCKED INTO MASTER
tSU:DAT
tSU:STO
tBUF
I = ACKNOWLEDGE CLOCK PULSE J = STOP CONDITION K = NEW START CONDITION
Figure 8. SMBus Read Timing
Communication starts with the master signaling the beginning of a transmission with a START condition, which is a high-to-low transition on SDA while SCL is high. When the master has finished communicating with the slave, the master issues a STOP condition, which is a low-to-high transition on SDA while SCL is high. The bus is then free for another transmission. Figures 7 and 8 show the timing diagrams for signals on the 2-wire interface. The address byte, command byte, and data byte are transmitted between the START and STOP conditions. The SDA state is allowed to change only while SCL is low, except for the START and STOP conditions. Data is transmitted in 8-bit words and is sampled on the rising edge of SCL. Nine clock cycles are required to
transfer each byte in or out of the MAX8709B since either the master or the slave acknowledges the receipt of the correct byte during the ninth clock. If the MAX8709B receives the correct slave address followed by R/W = 0, it expects to receive 1 or 2 bytes of information (depending on the protocol). If the device detects a START or STOP condition prior to clocking in the bytes of data, it considers this an error condition and disregards all the data. If the transmission is completed correctly, the registers are updated immediately after a STOP (or RESTART) condition. If the MAX8709B receives its correct slave address followed by R/W = 1, it expects to clock out the register data selected by the previous command byte.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Table 3. Commands Description
DATA REGISTER BIT ASSIGNMENT SMBus PROTOCOL Read and Write Read and Write Read Only Read Only Read and Write Read and Write Read Only Read Only COMMAND BYTE* 0x01 0b0XXX XX01 0x02 0b0XXX XX10 0x03 0b0XXX XX11 0x04 0b0XXX XX00 0xAA 0b10XX XXX0 0XA9 0b10XX XXX1 0xFE 0b11XX XXX0 0xFF 0b11XX XXX1 POR STATE 0x17 0xF9 0x0C 0x00 0x40 0x40 0x4D 0x0C BIT 7 (MSB) 0 BIT 6 0 BIT 5 0 1 ChipID5 0 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 (LSB)
BRIGHT4 BRIGHT0 BRIGHT3 BRIGHT2 BRIGHT1 (MSB) (LSB) 1 ChipID4 0 1 ChipID3 1 SHMD2 ChipID2 1 SHMD1 ChipID1 0 SHMD0 ChipID0 1
STATUS1 STATUS0 ChipID7 0 ChipID6 0
ChipRev7 ChipRev6 ChipRev5 ChipRev4 ChipRev3 ChipRev2 ChipRev1 ChipRev0 0 0 0 0 0 0 0 0 BRIGHT0 BRIGHT4 BRIGHT3 BRIGHT2 BRIGHT1 (LSB) (MSB) BRIGHT0 BRIGHT4 BRIGHT3 BRIGHT2 BRIGHT1 (LSB) (MSB) MfgID7 0 ChipID7 0 MfgID6 1 ChipID6 0 MfgID5 0 ChipID5 0 MfgID4 0 ChipID4 0 MfgID3 1 ChipID3 1 0 0 MfgID2 1 ChipID2 1 STATUS1 STATUS0 STATUS1 STATUS0 MfgID1 0 ChipID1 0 MfgID0 1 ChipID0 1
*The hexadecimal command byte shown is recommended for maximum forward compatibility with future products. X = Don't care.
SMBus Commands The MAX8709B registers are accessible through several different redundant commands (i.e., the command byte in the read-byte and write-byte protocols), which can be used to read or write the brightness, SHMD, status, or ID registers. Table 3 summarizes the command byte's register assignments, as well as each register's power-on state. The MAX8709B also supports the receive-byte protocol for quicker data transfers. This protocol accesses the register configuration pointed to by the last command
byte. Immediately after power-up, the data byte returned by the receive-byte protocol is the inverted contents of the brightness register, left justified (i.e., BRIGHT4 is in the most-significant-bit position of the data byte) with the 3 remaining bits containing a one, STATUS1, and STATUS0. This gives the same result as using the read-word protocol with 0b10XXXXXX (0xAA and 0xA9) command. Use caution with the shorter protocols in multimaster systems, since a second master could overwrite the command byte without informing the first master. During shutdown, the serial interface remains fully functional.
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Table 4. SHMD Register Bit Descriptions
BIT 2 1 0 NAME SHMD2 SHMD1 SHMD0 POR STATE 0 0 1 DESCRIPTION SHMD2 = 1 forces the lamp off and sets STATUS1. SHMD2 = 0 allows the lamp to operate, although it may still be shut down by SUS (depending on the state of SHMD1 and SHMD0). When SUS = 0, this bit has no effect. SUS = 1 and SHMD1 = 1 forces the lamp off and sets STATUS1. SUS = 1 and SHMD1 = 0 allows the lamp to operate, although it may still be shut down by the SHMD2 bit. When SUS = 1, this bit has no effect. SUS = 0 and SHMD0 = 1 forces the lamp off and sets STATUS1. SUS = 0 and SHMD0 = 0 allows the lamp to operate, although it may still be shut down by the SHMD2 bit.
Brightness Register [BRIGHT4 - BRIGHT0] (POR = 0b10111) The 5-bit brightness register corresponds to the 5-bit brightness code used in dimming control (See the Dimming Control section). BRIGHT4 - BRIGHT0 = 0b11111 sets minimum brightness and BRIGHT4 BRIGHT0 = 0b00000 sets maximum brightness. Note that the brightness-register polarity of command bytes 0xA9 and 0xAA are inverted from that of command byte 0x01. Shutdown-Mode Register [SHMD2-SHMD0] (POR = 0b001) The 3-bit shutdown-mode register configures the operation of the device when the SUS pin is toggled as described in Table 4. The shutdown-mode register can also be used to directly shut off the CCFL regardless of the state of SUS (Table 5).
Status Register [STATUS1-STATUS0] (POR = 0b11) The status register returns information on fault conditions. If the MAX8709B detects that V IFB does not exceed 30% of V LOT continuously for 1.22s, the IC latches STATUS1 to zero. STATUS1 is reset to 1 by toggling SUS or by toggling the input power. STATUS0 reports 1 as long as no overcurrent conditions are detected. If an overcurrent condition is detected in any given DPWM period, STATUS0 is cleared for the duration of the following DPWM period. If an overcurrent condition is not detected in any given DPWM period, STATUS0 is set for the duration of the following DPWM period. Note that the status-register polarity of command bytes 0xA9 and 0xAA are inverted from that of command byte 0x02. ID Registers The ID registers return information on the manufacturer chip ID and the chip revision number. The MAX8709B is the first-generation advanced CCFL controller and its ChipRev is 0x00. Reading from MfgID register returns 0x4D, which is the ASCII code for M (for Maxim). The ChipID register returns 0x0D. Writing to these registers has no effect.
Table 5. SUS and SHMD Register Truth Table
SUS 0 0 1 1 X SHMD2 SHMD1 SHMD0 0 0 0 0 1 X X 0 1 X 0 1 X X X OPERATING MODE Operate Shutdown, STATUS1 set Operate Shutdown, STATUS1 set Shutdown, STATUS1 set
Table 6. Status-Register Bit Descriptions (Read Only, Writes Have No Effect)
BIT NAME POR STATE 1 DESCRIPTION STATUS1 = 0 (or STATUS1 = 1) means that a lamp-out condition has been detected. The STATUS1 bit stays clear even after the lamp-out condition has gone away. The only way to set STATUS1 is to shut off the lamp by programming the shutdown-mode register or by toggling SUS. STATUS0 = 0 (or STATUS0 = 1) means that an overcurrent condition was detected during the previous DPWM period. STATUS0 = 1 means that an overcurrent condition was not detected during the previous DPWM period.
1
STATUS1
0
STATUS0
1
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Applications Information
To select the correct component values for the MAX8709B, several CCFL parameters must be specified. (Table 7). average of the half-wave rectified IFB voltage. To set the RMS lamp current, determine R1 as follows: R1 = x 400mV 2 x ILAMP(RMS)
MOSFETs
The MAX8709B requires four external n-channel power MOSFETs (NL1, NL2, NH1, and NH2) to form a full-bridge inverter circuit to drive the transformer primary. The regulator senses the on-state drain-to-source voltage of the two low-side MOSFETs NL1 and NL2 to detect the transformer primary current, so the RDS(ON) of NL1 and NL2 should be matched. For instance, if dual MOSFETs are used to form the full bridge, NL1 and NL2 should be in one package. Select dual logic-level n-channel MOSFETs with low R DS(ON) to minimize conduction loss for NL1/NL2 and NH1/NH2. The regulator utilizes the energy stored in the transformer's primary leakage inductance to softly turn on each of four switches in the full bridge ZVS occurs when the external power MOSFETs are turned on when their respective drain-to-source voltages are near 0V. ZVS effectively eliminates the instantaneous turn-on loss of MOSFETs caused by C OSS (drain-to-source capacitance) and parasitic capacitance discharge, and improves efficiency and reduces switching-related EMI.
where ILAMP(RMS) is the desired RMS lamp current and 400mV is the typical value of the IFB regulation point specified in the Electrical Characteristics table. To set the RMS lamp current to 6mA, the value of R1 should be 148. The closest standard 1% resistors are 147 and 150. The precise shape of the lamp-current waveform, which is dependent on lamp parasitics, influences the actual RMS lamp current. Use a true RMS current meter to make final adjustments to R1.
Setting the Secondary Voltage Limit
The MAX8709B limits the transformer secondary voltage during lamp striking and lamp-out faults. The secondary voltage is sensed through the capacitive voltage-divider formed by C3 and C4 (Figure 1). The voltage on VFB is proportional to the CCFL voltage. The selection of the parallel resonant capacitor C3 is described in the Transformer Design and Resonant Component Selection section. C3 is usually between 10pF to 22pF. After the value of C3 is determined, select C4 using the following equation to set the desired maximum RMS secondary voltage VLAMP(RMS)_MAX: 2xV LAMP(RMS)_ MAX C4 = - 1 x C3 x 510mV where 510mV is the typical value of the VFB regulation threshold specified in the Electrical Characteristics
Setting the Lamp Current
The MAX8709B senses the lamp current flowing through a resistor R1 (Figure 1) connected between the low-voltage terminal of the lamp and ground. The voltage across R1 is fed to IFB and is internally rectified. The MAX8709B controls the desired lamp current by regulating the
Table 7. CCFL Specifications
SPECIFICATION CCFL Minimum Striking Voltage (Kick-Off Voltage) SYMBOL UNITS DESCRIPTION Although CCFLs typically operate at less than 550VRMS, a higher voltage (1000VRMS and up) is required initially to start the tube. The strike voltage is typically higher at cold temperatures and at the end of life of the tube. Resonant operation and the high Q of the resonant tank generate the required strike voltage of the lamp. Once a CCFL has been struck, the lamp voltage required to maintain light output falls to approximately 550VRMS. Short tubes may operate on as little as 250VRMS. The operating voltage of the CCFL stays relatively constant, even as the tube's brightness is varied. The desired RMS AC current through a CCFL is typically 6mARMS. DC current is not allowed through CCFLs. The sense resistor, R1, sets the lamp current. The maximum AC-lamp-current frequency. The circuit should be designed to operate the lamp below this frequency. The MAX8709B is designed to operate between 20kHz and 100kHz.
VSTRIKE
VRMS
CCFL Typical Operating Voltage (Lamp Voltage) CCFL Operating Current (Lamp Current) CCFL Maximum Frequency (Lamp Frequency)
VLAMP
VRMS
ILAMP
mARMS
f
kHz
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High-Efficiency CCFL Backlight Controller with SMBus Interface
table. If C3 is 15pF, C4 needs to be 21.2nF to set the desired maximum RMS secondary voltage to 1600V. The closest standard value of C4 is 22nF. The resistor R2 is used to set the VFB DC bias point to 0V. Choose the value of R2 as follows: R2 = 10 2 x fSW x C4 range is determined by the transformer secondary leakage inductance L, the primary series DC-blocking capacitor C2, and the secondary parallel resonant capacitor C3. Since it is difficult to control the transformer leakage inductance, the resonant tank design should be based on the existing secondary leakage inductance of the selected CCFL transformer. The leakage inductance values usually have large tolerance and significant variations among different batches. It is best to work directly with transformer vendors on leakage inductance requirements. The MAX8709B works best when the secondary leakage inductance is between 250mH and 350mH. The series capacitor C2 sets the minimum operating frequency, which is approximately two times the series resonant peak frequency. Choose: 2 x f 2 MIN x L where fMIN is the minimum operating frequency range. Parallel capacitor C3 sets the maximum operating frequency, which is also the parallel resonant peak frequency. Choose: C3 C2 (4 x f 2MAX x L x C2) - N2
2
MAX8709B
where fSW is the nominal resonant operating frequency.
Setting the Secondary Current Limit
The MAX8709B limits the secondary current even if the IFB sense resistor is shorted or transformer secondary current finds its way to ground without passing through R1. ISEC monitors the voltage across the sense resistor R3 connected between the low-voltage terminal of the transformer secondary winding and ground. Determine the value of R3 using the following equation: R3 = 1.25V 2 x ISEC(RMS)_ MAX
C2
N2
where ISEC(RMS)_MAX is the desired maximum RMS transformer secondary current during fault conditions, and 1.25V is the typical value of the ISEC regulation point specified in the Electrical Characteristics table.
Transformer Design and Resonant Component Selection
The transformer is the most important component of the resonant tank circuit. The first step in designing the transformer is to determine the transformer turns ratio. The ratio must be high enough to support the CCFL operating voltage at the minimum supply voltage. The transformer turns-ratio N can be calculated as follows: 0.9 x VIN(MIN) where VLAMP(RMS) is the maximum RMS lamp voltage in normal operation, and VIN(MIN) is the minimum DC input voltage. The next step in the design procedure is to determine the desired operating frequency range. The MAX8709B is synchronized to the natural resonant frequency of the resonant tank. The resonant frequency changes with operating conditions, such as the input voltage, lamp impedance, etc. Therefore, the switching frequency varies over a certain range. To ensure reliable operation, the resonant frequency range must be within the operating frequency range specified by the CCFL lamp transformer manufacturers. As discussed in the Resonant Operation section, the resonant frequency N= VLAMP(RMS)
The transformer core saturation also needs to be considered when selecting the operating frequency. The primary winding should have enough turns to prevent transformer saturation under all operating conditions. Use the following expression to calculate the minimum number of turns (N1) of the primary winding: N1> DMAX x VIN(MAX) BS x S x fMIN
where DMAX is the maximum duty cycle (approximately 0.8) of the high-side switches, VIN(MAX) is the maximum DC input voltage, BS is the saturation flux density of the core, and S is the minimal cross-section area of the core.
Compensation Design
The CCI capacitor sets the speed of the current loop that is used during startup, maintaining lamp current regulation, and during transients caused by changing the input voltage. The typical CCI value is 0.1F. Larger values increase the transient-response delays. Smaller values speed up transient response, but extremely small values can cause loop instability. The CCV capacitor sets the speed of the voltage loop that affects soft-start and soft-stop during DPWM operation, and voltage loop stability during startup and openlamp conditions. The typical CCV capacitor value is 10nF. Use the smallest value of CCV that gives an
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High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
acceptable fault transient response and does not cause excessive ringing at the beginning of a DPWM pulse. Larger CCV values reduce transient overshoot but can reduce light output at low-DPWM duty cycles by increasing the time required to reach the tube strike voltage. 3) for REF, CCV, CCI, and ILIM (if a resistive voltagedivider is used). Route high-speed switching nodes away from sensitive analog areas (CCI, CCV, REF, VFB, IFB, ISEC, ILIM). Make all pin-strap control input connections (ILIM, etc.) to analog ground or VCC rather than power ground or VDD. Mount the decoupling capacitor from VCC to GND as close as possible to the IC with dedicated traces that are not shared with other signal paths. The current-sense paths for LX1 and LX2 to GND must be made using Kelvin-sense connections to guarantee the current-limit accuracy. With 8-pin SO MOSFETs, this is best done by routing power to the MOSFETs from outside using the top copper layer, while connecting GND and LX inside (underneath) the 8-pin SO package. Ensure the feedback connections are short and direct. To the extent possible, IFB, VFB, and ISEC connections should be far away from the high-voltage traces and the transformer. To the extent possible, high-voltage trace clearance on the transformer's secondary should be widely separated. The high-voltage traces should also be separated from adjacent ground planes to prevent lossy capacitive coupling. The traces to the capacitive voltage-divider on the transformer's secondary need to be widely separated to prevent arcing. Moving these traces to opposite sides of the board can be beneficial in some cases (see Figure 9).
C4 C2 N1 N2 T1 C3 R2 LAMP D1
Other Components
The external bootstrap circuits formed by D1 and C5/C6 in Figure 1 power the high-side MOSFET drivers. Connect BST1/BST2 through a signal-level silicon diode to VDD, and bypass it to LX1/LX2 with a 0.1F ceramic capacitor. 4)
5)
Layout Guidelines
Careful PC board layout is critical to achieve stable operation. The high-voltage section and the switching section of the circuit require particular attention. The high-voltage sections of the layout need to be well separated from the control circuit. Most layouts for singlelamp notebook displays are constrained to the long and narrow form factor, so this separation occurs naturally. Follow these guidelines for good PC board layout: 1) Keep the high-current paths short and wide, especially at the ground terminals. This is essential for stable, jitter-free operation, and high efficiency. Utilize a star-ground configuration for power and analog grounds. The power and analog grounds should be completely isolated--meeting only at the center of the star. The center should be placed at the exposed backside pad to the QFN package. Using separate copper islands for these grounds may simplify this task. Quiet analog ground is used
6)
7)
2)
8)
HIGH-CURRENT PRIMARY CONNECTION NOTE: DUAL MOSFET N2 IS MOUNTED ON THE BOTTOM SIDE OF THE PC BOARD DIRECTLY UNDER N1.
HIGH-VOLTAGE SECONDARY CONNECTION
Figure 9. High-Voltage Components Layout Example
22
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High-Efficiency CCFL Backlight Controller with SMBus Interface
Pin Configuration
BATT CCV N.C. VFB VCC CCI
Chip Information
TRANSISTOR COUNT: 7116 PROCESS: BiCMOS
MAX8709B
TOP VIEW
28
ILIM REF LOT GND ISEC SDA SCL
27
26
25
24
IFB
23
22 21 20 19
GH2 LX2 BST2 BST1 LX1 GH1 GL1
1 2 3 4 5 6 7 8
SUS
MAX8709BETI
18 17 16 15
9
N.C.
10
N.C.
11
N.C.
12
VDD
13
PGND
14
GL2
THIN QFN
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23
High-Efficiency CCFL Backlight Controller with SMBus Interface MAX8709B
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QFN THIN.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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